When microprocessors associated with such a network are to dialogue with one another through the intermediary of that network, their messages must be synchronously introduced into and extracted from the data flow of the network even though the microprocessors themselves are generally timed by their own independent clocks. It has heretofore been customary to interlink the several microprocessors by point-to-point connections enabling the direct transfer of data therebetween, yet this solution entails great circuit complexities especially when a significant number of microprocessors or other data-handling components are involved. With more than two microprocessors there is also the problem of avoiding interferences among messages concurrently arriving at the same destination. Moreover, each connection must have its own interface circuitry and data stores along with control means therefor. The handling of the messages is relatively slow and thus significantly impedes the work of a processing unit operating in real time. The use of multiprocessing techniques with a common bus interconnecting a multiplicity of memories is only a partial remedy and tends to reduce the flexibility of the system.